The reasons for the need for virtual memory:
As demand on the CPU increases, processes slow down in some reasonably smooth way. But if too many processes need too much memory, then some of them will simply not be able to run. When a program is out of space, it is out of luck. Memory is also vulnerable to corruption. If some process inadvertently writes to the memory used by another process, that process might fail in some bewildering fashion totally unrelated to the program logic.
VMThe role of:
(1) It uses main memory efficiently by treating it as a cache for an address space stored on disk, keeping only the active areas in main memory, and transferring data back and forth between disk and memory as needed.
(2) It simplifies memory management by providing each process with a uniform address space.
(3) It protects the address space of each process from corruption by other processes.
The main memory of a computer system is organized as an array of M contiguous byte-sized cells. Each byte has a unique physical address (PA).
Given this simple organization, the most natural way for a CPU to access memory would be to use physical addresses. We call this approach physical addressing.（As shown in the following figure)
virtual addressingThe general process:
With virtual addressing, the CPU accesses main memory by generating a virtual address (VA), which is converted to the appropriate physical address before being sent to the memory. The task of converting a virtual address to a physical one is known as address translation. Like exception handling, address translation requires close cooperation between the CPU hardware and the operating system. Dedicated hardware on the CPU chip called the memory management unit (MMU) translates virtual addresses on the fly, using a look-up table stored in main memory whose contents are managed by the operating system.
The illustration is as follows:
virtual address space：In a system with virtual memory, the CPU generates virtual addresses from an address space of N = 2n addresses called the virtual address space
A system also has a physical address space that corresponds to the M bytes of physical memory in the system（M is not required to be a power of two, but to simplify the discussion we will assume that M = 2m.）
VMThe core idea:
The concept of an address space is important because it makes a clean distinction between data objects (bytes) and their attributes (addresses). Once we recognize this distinction, then we can generalize and allow each data object to have multiple independent addresses, each chosen from a different address space. This is the basic idea of virtual memory. Each byte of main memory has a virtual address chosen from the virtual address space, and a physical address chosen from the physical address space.
VM as a Tool for Caching
As with any other cache in the memory hierarchy, the data on disk (the lower level) is partitioned into blocks that serve as the transfer units between the disk and the main memory (the upper level). VM systems handle this by partitioning the virtual memory into fixed-sized blocks called virtual pages (VPs). Each virtual page is P = 2p bytes in size. Similarly, physical memory is partitioned into physical pages (PPs), also P bytes in size. (Physical pages are also referred to as page frames.)
virtual pages’ three disjoint subsets(on the disk，Pay attention to the N and m here):
Unallocated: Pages that have not yet been allocated (or created) by the VM system. Unallocated blocks do not have any data associated with them, and thus do not occupy any space on disk.
Cached: Allocated pages that are currently cached in physical memory.
Uncached: Allocated pages that are not cached in physical memory
DRAM Cache Organization:
To help us keep the different caches in the memory hierarchy straight, we will use the term SRAM cache to denote the L1, L2, and L3 cache memories between the CPU and main memory, and the term DRAM cache to denote the VM system’s cache that caches virtual pages in main memory.
Considerations on the memory level:
Because of the large miss penalty and the expense of accessing the first byte, virtual pages tend to be large, typically 4 KB to 2 MB. Due to the large miss penalty, DRAM caches are fully associative, that is, any virtual page can be placed in any physical page. The replacement policy on misses also assumes greater importance, because the penalty associated with replacing the wrong virtual page is so high. Thus, operating systems use much more sophisticated replacement algorithms for DRAM caches than the hardware does for SRAM caches. (These replacement algorithms are beyond our scope here.) Finally, because of the large access time of disk, DRAM caches always use write-back instead of write-through.
page table : maps virtual pages to physical pages.
The address translation hardware: reads the page table each time it converts a virtual address to a physical address.
The operating system: responsible for maintaining the contents of the page table and transferring pages back and forth between disk and DRAM.
A page table is an array of page table entries (PTEs).
Each page in the virtual address space has a PTE at a fixed offset in the page table. For our purposes, we will assume that each PTE consists of a valid bit and an n-bit address field. The valid bit indicates whether the virtual page is currently cached in DRAM. If the valid bit is set, the address field indicates the start of the corresponding physical page in DRAM where the virtual page is cached. If the valid bit is not set, then a null address indicates that the virtual page has not yet been allocated. Otherwise, the address points to the start of the virtual page on disk.(notice again that physical memory is on DRAM and virtual memory is on disk)
Because the DRAM cache is fully associative, any physical page can contain any virtual page.